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BH3868BFS
Audio ICs
Audio sound processor with
BH3868BFS
R
BH3868BFS is a Audio sound processor IC developed for TV. This IC is built-in volume, balance, tone, surround, BBE 2 processor and AGC. This IC can be easily controlled by tow-wire serial control (I C BUS).
BBE is a registered trade mark of BBE Sound Inc. Note : I2C BUS is a registered trade mark of Philips.
!Applications Suitable for TV, TV-radio, PC-TV, mini-component and car audio system, etc.
!Features 1) Volume (main volume), balance (right/left), tone (bass and treble), surround (mode and effect), BBE processor (effect) 2 can be controlled by I C-BUS. 2) Volume is VCA with low distortion rate and low noise and can restrain the step noise. 3) The reference voltage source is stable, only a few external devices are required because I/O buffer is contained, and the package is suitable for space-saving design for SSOP-A32. 4) Sound spread can be controlled by the matrix surround and effect adjustment. 5) The built-in AGC circuit can absorb the volume difference between input sources. 6) The contained BBE processor, which reproduce an original sound, controls the effect.
!Absolute maximum ratings (Ta=25C)
Parameter Impressed voltage Power dissipation Operating temperature range Storage temperature range Symbol VCC Pd Topr Tstg Limits 10.0 850 -40 to +85 -55 to +150 Unit V mW C C
When mounted on a glass epoxy board 70mm x 70mm x 1.6mm. Reduced by 6.8mW for each increase in Ta of 1C over 25C.
!Recommended operating conditions (Ta=25C)
Parameter Power supply voltage Symbol VCC Min. 7.0 Typ. - Max. 9.5 Unit V
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!Block diagram
SCL
17
16
CHIP
SDA
18
VCC
15
VCC
BC
19
LOGIC CONTROL
14
TC
VC1
20
13
VC2
VOL
TONE
BAS1
23
TONE
TRE1
22
Vref
OUT1
21
VOL
12
OUT2
11
TRE2
10
BAS2
BTREA1
25
LPF AMP
BTREB1
24
R-S
L+S
9
BTREB2
8
BTREA2
BBASB1
26
PHASE SHIFT
7
BBASB2
BBE
BBASA1
27
L-R L+R
BBE
6
BBASA2
VOL
IN1
28
VOL
5
IN2
PS2
29
4
SOUT
PS1
30
AGC
3
LS2
AGCADJ
31
2
LS1
BIAS
FILTER
32
1
GND
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!Pin descriptions
Pin No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 Pin name GND LS1 LS2 SOUT IN2 BBASA2 BBASB2 BTREA2 BTREB2 BAS2 TRE2 OUT2 VC2 TC VCC CHIP SCL SDA BC VC1 OUT1 TRE1 BAS1 BTREB1 BTREA1 BBASB1 BBASA1 IN1 PS1 PS2 AGCADJ FILTER Ground terminal ALC detector terminal at suppression side ALC detector terminal at amplification side Surround signal output terminal 2ch sound signal input terminal 2chBBE contour frequency setting terminal 2chBBE contour frequency setting terminal 2chBBE process frequency setting terminal 2chBBE process frequency setting terminal 2ch bass fc setting terminal 2ch treble fc setting terminal 2ch sound signal output terminal 2ch volume control terminal Treble control terminal Power supply terminal Chip select terminal I2C clock input terminal I2C data input terminal Bass control terminal 1ch volume control terminal 1ch sound signal output terminal 1ch treble fc setting terminal 1ch bass fc setting terminal 1chBBE process frequency setting terminal 1chBBE process frequency setting terminal 1chBBE contour frequency setting terminal 1chBBE contour frequency setting terminal 1ch sound signal input terminal 1st phase shift setting terminal 2nd phase shift setting terminal AGC suppression level setting terminal Filter terminal Function
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!Input output circuits The terminal voltage shall be on when the data 0V volume=minimum, tone=flat, BBE=OFF, surround=OFF and AGC=OFF after the power supply Vcc=9.0(V) has been turned on, and any external devices shall comply with the measurement circuit diagram.
Pin. No Pin name Terminal voltage
VCC
Equivalent circuit
Description
430
2
LS1
0V
2pin
Terminal to set a time constant at a side for suppressing a signal level of AGC.
GND
VCC
20k
3
LS2
0V
3pin
Terminal to set a time constant at a side for amplifying a signal level of AGC.
GND
VCC
4
SOUT
4.5V
4pin
Terminal for output of surround and pseudo stereo and to set a frequency characteristic.
10k
GND
VCC
5 28
IN2 IN1
4.5V
5pin 28pin 30k
Terminal for sound signal input.
GND
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Pin. No Pin name Terminal voltage
VCC
Equivalent circuit
Description
6 27
BBASA2 BBASA1
4.5V
6pin 27pin 21.5k
Terminal to set a contour frequency of BBE.
GND
VCC 200
7 26
BBASB2 BBASB1
4.5V
7pin 26pin
Terminal to set a contour frequency of BBE.
200 GND
VCC
8 25
BTREA2 BTREA1
4.5V
8pin 25pin 21.5k
Terminal to set a process frequency of BBE.
GND
VCC 200
9 24
BTREB2 BTREB1
4.5V
9pin 24pin
Terminal to set a process frequency of BBE.
200 GND
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Pin. No Pin name Terminal voltage
VCC
Equivalent circuit
Description
10 23
BAS2 BAS1
4.5V
10pin 23pin
Terminal to the cutoff frequency of bass tone control.
GND
VCC
11 22
TRE2 TRE1
4.5V
11pin 22pin 30k
Terminal to the cutoff frequency of treble tone control.
GND
VCC 200
12 21
OUT2 OUT1
4.5V
12pin 21pin
Terminal for sound signal output.
200 GND
VCC
13 20
VC2 VC1
0V
13pin 20pin
Terminal equipped with an external circuit to prevent a shock sound upon volume switching.
30k D/A
GND
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Pin. No Pin name Terminal voltage
VCC
Equivalent circuit
Description
14 19
TC BC
1.94V
14pin 19pin
Terminal equipped with an external circuit to prevent a shock sound upon tone switching.
30k D/A
GND
VCC
250k
16
CHIP
-
16pin
Chip select terminal.
GND
VCC
17
SCL
-
17pin
Clock input terminal for I2C BUS controller.
GND
VCC
18
SDA
-
18pin 50
Data input terminal for I2C BUS controller.
GND
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Pin. No Pin name Terminal voltage
VCC
Equivalent circuit
Description
29
PS1
4.5V
29pin
Terminal to set the 1st phase shift.
18k 18k 10k
GND
VCC
30
PS2
4.5V
30pin
Terminal to set the 2nd phase shift.
18k 18k
GND
VCC
20k
20k
31
AGCADJ
-
31pin
Terminal to set the cut levle of AGC.
GND
VCC
50k
32
FILTER
4.5V
32pin
Filter terminal.
50k
GND
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!Electrical characteristics (unless otherwise noted, Ta=25C, VCC=9V, f=1kHz, BW=20kHz, VOL=MAX, surround = OFF, TONE=FLAT, AGC=OFF, BBE=OFF, AGCADJ=3.45V, RR=600, RL=10k)
Parameter Current upon no signal Maximum input Maximum output Voltage gain Maximum attenuation Cross-talk Bass control range Symbol IQ VIM VOM GV ATT VCT VBMax. VBMin. VTMax. VTMin. GSR GPS GPH AGC1 AGC2 AGC3 AGC4 THD VNO1 VMNO GCA RIN ROUT RR VIH VIL Min. - 2.8 2.2 -1.5 90 70 12 -18 12 -18 7 9 9 0.7 50 150 200 - - - -1.5 20 - 40 3 -0.5 Typ. 30 3.0 2.5 0 110 80 15 -15 15 -15 10 10 10 1.0 75 200 280 0.01 48 2.5 0 30 - - 5 0 Max. 45 - - 1.5 - - 18 -12 18 -12 13 11 11 1.4 100 250 360 0.1 75 10 1.5 40 10 - 5.5 1.5 Unit mA Vrms Vrms dB dB dB dB dB dB dB dB dB dB mVrms mVrms mVrms mVrms % Vrms Vrms dB k V V V No signal THD=1%, VOL=-20dB (ATT) THD=1% VIN=1Vrms VIN=1Vrms VIN=1Vrms 100Hz, VIN=100mVrms 100Hz, VIN=100mVrms 10kHz, VIN=100mVrms 10kHz, VIN=100mVrms VIN=1Vrms 100Hz, VIN=100mVrms 10kHz, VIN=100mVrms VIN=1.0mVrms VIN=50mVrms VIN=200mVrms VIN=1.0Vrms VO=0.5Vrms, BPF=400Hz~30kHz No signal, VOL=Max. Rg=0 No signal, VOL=-, Rg=0 Measured based on CH1. f=1kHz f=1kHz f=100Hz, VRR=100mVrms SCL, SDA SCL, SDA Conditions
Treble control range Surround effect control range BBE Contour control range BBE Process control range AGC I/O level 1 AGC I/O level 2 AGC I/O level 3 AGC I/O level 4 Total harmonic distortion Output noise voltage Residual output noise voltage Channel balance Input impedance Output impedance Ripple rejection Input voltage "H" Input voltage "L"
Measured by VP-9690A of Matsushita (detection of mean value and indication of root-mean-value). Radiation resistance is not included in the design. The I/O phase of signal is the same.
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!Control signal specification (1) Electrical specifications and timing for bus lines and I/O stages
SDA
tBUF tLOW tR tF tHD : STA tSP
SCL tHD : STA P S tHD : DAT tHIGH tSU : DAT tSU : STA Sr tSU : STO P
Fig.1 Definition of timing on the I2C BUS
Table B Characteristics of the SDA and SCL bus lines for I C BUS devices
Parameter SCL clock fequency Bus free time between a STOP and START condition Hold time (repeated) START condition. After this period, the first clock pulse is generated LOW period of the SCL clock HIGH period of the SCL clock Set-up time for a repeated START condition Data hold time Data set-up time Rise time of both SDA and SCL signals Fall time of both SDA and SCL signals Set-up time for STOP condition Capacitive load for each bus line Symbol fSCL Min. 0 Max. 100 Unit kHz
2
tBUF
tHD ; STA tLOW tHIGH tSU ; STA tHD ; DAT tSU ; DAT tR tF tSU ; STO Cb
4.7 4.0 4.7 4.0 4.7 0 250 - - 4.0 -
- - - - - - - 1000 300 - 400
s s s s s s ns ns ns s pF
All values referred to VIH min. and VIL max. Levels (see Table C). A device must internally provide a hold time of at least 300ns for the SDA signal (referred to the VIH min. of the SCL signal) in order to bridge the undefined region of the falling edge of SCL.
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Table C Characteristics of the SDA and SCL I/O stages for I C BUS devices
Parameter LOW level input voltage : fixed input levels VDD-related input levels HIGH level input voltage : fixed input levels VDD-related input levels Hysteresis of Schmitt trigger inputs : Fixed input levels VDD-related input levels Pulse width of spikes which must be suppressed by the input filter. LOW level output voltage (open drain or open collector) : at 3mA sink current at 6mA sink current Output fall time from VIH min. to VIL max. with a bus capacitance from 10pF to 400pF : with up to 3mA sink current at VOL1 with up to 6mA sink current at VOL2 Input current each I/O pin with an input voltage between 0.4V and 0.9 VDDmax. Capacitance for each I/O pin.
n/a = not applicable 1 maximum VIH=VDDmax. + 0.5V 2 Cb=capacitance of one bus line in pF. Note that the maximum tF for the SDA and SCL bus lines quoted in Table B (300ns) is longer than the specified maximum tOF for the output stages (250ns). This allows series protection resistors (RS) to be connected between the SDA/SCL pins and the SDA/SCL bus lines as shown in Fig.1 without exceeding the maximum specified tF. The above-mentioned characteristics are theoretical values based on IC design and the delivery inspection does not guarantee anything. If any trouble is made, we will take necessary arrangements and actions in our faith.
2
Symbol
Min.
Max.
Unit
VIL
-0.5 (-0.5)
1.5 (0.3 VDD)
V
VIH
3.0 (0.7 VDD)
1
V
(1)
Vhys
n/a (n/a)
n/a (n/a) n/a
V
tSP
n/a
ns
VOL1 (VOL2)
0 (n/a)
0.4 (n/a)
V
tOF
- (n/a)
2502 (n/a) 10 10
ns
II CI
-10 -
A pF
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(2) I C BUS format
MSB LSB MSB LSB MSB LSB
2
S
1bit
Slave Address
8bit
A
1bit
Select Address
8bit
A
1bit
Data
8bit
A
1bit
P
1bit
*S * Slave Address *A * Select Address * Data *P Slave Address of BH3868BFS Fixing 16pin to VCC
=Start condition (Recognition of start bit) =Recognition of IC. The high order 7 bits are optional. The least significant bit is "L" for writing. =Acknowledge bit (Recognition of acknowledgement) =Selection of 1ch volume, 2ch volume, BBE effect, bass+BBE, treble+MUTE and AGC+matrix surround. =Data on volume and tone. =Stop condition (Recognition of stop bit)
MSB
LSB
D7 1
D6 0
D5 0
D4 0
D3 0
D2 0
D1 1
R/W 0
Making 16pin OPEN
MSB LSB
D7 1
D6 0
D5 0
D4 0
D3 0
D2 0
D1 0
R/W 0
(3) Setting of Select Address
Parameter 0 1 2 3 4 5 1ch Volume 2ch Volume BBE Processor BBE, Bass MUTE, Treble AGC, Surround MSB D7 0 0 0 0 0 0 D6 0 0 0 0 0 0 D5 0 0 0 0 0 0 D4 0 0 0 0 0 0 D3 0 0 0 0 0 0 D2 0 0 0 0 1 1 D1 0 0 1 1 0 0 LSB D0 0 1 0 1 0 1
Upon transferring consecutive data, the select address circulates because of the automatic increment function as follows: 012345 The circulation starts from the select address specified first. It doesn't patrol from selection address 5 to selection address 0.
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(4) Data Configuration
MSB Parameter 0 1 2 3 4 5 1ch Volume 2ch Volume BBE Processor BBE, Bass MUTE, Treble AGC, Surround BBE MUTE AGC SON SSTE SMON Process Bass Treble LOOP Surround Effect D7 D6 D5 D4 D3 D2 D1 LSB D0
1ch Volume 2ch Volume Contour
Volume : BBE Processor : Bass / Treble : Surround Effect : BBE : AGC : MUTE : LOOP : SSTE : SMON : SON :
all H : all L : all H : all L : all H : all L : all H : all L : H : ON H : ON H : ON H : ON H : ON H : ON H : ON
ATT 0dB ATT -dB Max. Min. Max. Min. Max. Min. L : OFF L : OFF(AGC : Auto Gain Control) L : OFF L : OFF(LOOP : surround effect enhanceer) L : OFF(SSTE : Surround STEreo) L : OFF(SMON : Surround MONoral) L : OFF(SON : Surround ON)
Note : It is advisable to apply MUTE upon switching the mode and gain of BBE and SURROUND.
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Volume Gain setting list
Gain (dB) 0 -1 -2 -3 -4 -5 -6 -7 -8 -9 -10 -11 -12 -13 -14 -15 -16 -17 -18 -19 -20 -22 -24 -26 -28 -30 -32 -34 -36 -38 -40 -42 -44 -46 -48 -50 -52 -54 -56 -58 -60 Hex. Notation FFH EAH DFH D6H CFH C8H C2H B9H B8H B3H AEH AAH A6H A2H 9EH 9AH 96H 93H 90H 8CH 89H 83H 7DH 78H 72H 6DH 68H 64H 5FH 5BH 57H 52H 4FH 4BH 47H 42H 40H 3DH 3AH 37H 34H D7 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 D6 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 D5 1 1 0 0 0 0 0 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 1 1 1 1 D4 1 0 1 1 0 0 0 1 1 1 0 0 0 0 1 1 1 1 1 0 0 0 1 1 1 0 0 0 1 1 1 1 0 0 0 0 0 1 1 1 1 D3 1 1 1 0 1 1 0 1 1 0 1 1 0 0 1 1 0 0 0 1 1 0 1 1 0 1 1 0 1 1 0 0 1 1 0 0 0 1 1 0 0 D2 1 0 1 1 1 0 0 0 0 0 1 0 1 0 1 0 1 0 0 1 0 0 1 0 0 1 0 1 1 0 1 0 1 0 1 0 0 1 0 1 1 D1 1 1 1 1 1 0 1 0 0 1 1 1 1 1 1 1 1 1 0 0 0 1 0 0 1 0 0 0 1 1 1 1 1 1 1 1 0 0 1 1 0 D0 1 0 1 0 1 0 0 1 0 1 0 0 0 0 0 0 0 1 0 0 1 1 1 0 0 1 0 0 1 1 1 0 1 1 1 0 0 1 0 1 0
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Gain (dB) -62 -64 -66 -68 -70 -72 -74 -76 -78 -80 -82 -84 - Hex. Notation 32H 2FH 2DH 2AH 28H 26H 24H 22H 20H 1EH 1DH 1BH 00H D7 0 0 0 0 0 0 0 0 0 0 0 0 0 D6 0 0 0 0 0 0 0 0 0 0 0 0 0 D5 1 1 1 1 1 1 1 1 1 0 0 0 0 D4 1 0 0 0 0 0 0 0 0 1 1 1 0 D3 0 1 1 1 1 0 0 0 0 1 1 1 0 D2 0 1 1 0 0 1 1 0 0 1 1 0 0 D1 1 1 0 1 0 1 0 1 0 1 0 1 0 D0 0 1 1 0 0 0 0 0 0 0 1 1 0
Treble / Bass setting list Treble Gain
Gain (dB) +15 +15 +14 +12 +10 +8 +6 +4 +2 0 -2 -4 -6 -8 -10 -12 -14 -15 Hex. Notation 7FH 3FH 36H 32H 2FH 2DH 2BH 29H 26H 20H 1AH 17H 15H 13H 11H 0EH 0AH 00H D6 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 D5 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 D4 1 1 1 1 0 0 0 0 0 0 1 1 1 1 1 0 0 0 D3 1 1 0 0 1 1 1 1 0 0 1 0 0 0 0 1 1 0 D2 1 1 1 0 1 1 0 0 1 0 0 1 1 0 0 1 0 0 D1 1 1 1 1 1 0 1 0 1 0 1 1 0 1 0 1 1 0 D0 1 1 0 0 1 1 1 1 0 0 0 1 1 1 1 0 0 0
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Bass Gain
Gain (dB) +15 +15 +14 +12 +10 +8 +6 +4 +2 0 -2 -4 -6 -8 -10 -12 -14 -15 Hex. Notation 7FH 3FH 36H 32H 2FH 2DH 2BH 29H 26H 20H 1AH 17H 15H 13H 11H 0EH 0AH 00H D6 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 D5 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 D4 1 1 1 1 0 0 0 0 0 0 1 1 1 1 1 0 0 0 D3 1 1 0 0 1 1 1 1 0 0 1 0 0 0 0 1 1 0 D2 1 1 1 0 1 1 0 0 1 0 0 1 1 0 0 1 0 0 D1 1 1 1 1 1 0 1 0 1 0 1 1 0 1 0 1 1 0 D0 1 1 0 0 1 1 1 1 0 0 0 1 1 1 1 0 0 0
BBE Gain Process
Gain (dB) 10.0 9.0 8.0 7.0 6.0 5.5 5.0 4.5 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 Hex. Notation FH EH DH CH BH AH 9H 8H 7H 6H 5H 4H 3H 2H 1H 0H D7 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 D6 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 D5 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 D4 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0
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Contour
Gain (dB) 10.0 9.0 8.0 7.0 6.0 5.5 5.0 4.5 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 Hex Notation FH EH DH CH BH AH 9H 8H 7H 6H 5H 4H 3H 2H 1H 0H D3 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 D2 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 D1 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 D0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0
Surround Gain setting list
Gain (dB) 10 9 8 7 6 5 4 3 Hex. Notation 7H 6H 5H 4H 3H 2H 1H 0H D2 1 1 1 1 0 0 0 0 D1 1 1 0 0 1 1 0 0 D0 1 0 1 0 1 0 1 0
Reference value : The setting table is a reference value persistently and the sctual use condition sometimes changes the gain of volume, the tone, surround. In case of data setting, we request confirmation.
(5) Notes on Data Transfer This IC is equipped with the automatic increment function to improve the rate of data transfer. In addition to the data format shown in the under-mentioned Basic Format, the other data format Automatic Increment is also available for the data transfer. 1) Basic format
MSB LSB MSB LSB MSB LSB
S
Slave Address
A
Select Address
A
Data
A
P
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2) Automatic Increment (The Select Address is incremented (by one) according to the number of data.)
MSB LSB MSB LSB MSB LSB
S
Slave Address
A
Select Address
A
Data1, Data2, * * * * * , DataN
A
P
Example : <1> Data 1 shall be set as the data of the address specified by the Select Address. <2> Data 2 shall be set as the data of the address specified by the Select Address +1. <3> Data N shall be set as the data of the address specified by the Select Address +N-1. 3) Configuration Unavailable for Transfer (In this case, the Select Address 1 only is set.)
MSB LSB MSB LSB MSB LSB MSB LSB MSB LSB
S
Slave Address
A
Select Address
A
Data
A
Select Address 2
A
Data
A
P
Note : If any data is sent as the Select Address 2 immediately after the Data, such data is recognized as the Data, not the Select Address 2. !AGC (1) Level Setting The AGC suppression level can be set by the voltage of the AGDADJ terminal (31pin). Assuming that the suppression level is GC (mVrms) and the AGCADJ voltage is ADJ (V), setting can be expressed as follows: GC=-286xADJ+1186 The under-mentioned table shows a guideline of setting.
Suppression Level (mVrms) 100 200 300 400 AGCADJ Terminal Voltage (V) 3.8 3.45 3.1 2.75
The level specified by the electrical characteristic is AGCADJ=3.45 (V) and the suppression level is approximately 200 (mVrms). Use the suppression level in a rage from 100 (mVrms) to 400 (mVrms). The under-mentioned chart shows the characteristic when the suppression level is set to 100 (mVrms), 200 (mVrms), 300 (mVrms) and 400 (mVrms).
10
1
VOLUME=MAX. TONE=FLAT BBE=OFF SURROUND=OFF AGC=ON f=1kHz
OUTPUT (Vrms)
0.1
0.01
0.001 0.001
0.01
0.1 INPUT (Vrms)
1
10
Fig.2 AGC characteristics
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(2) Setting of Attack Time and Release Time In this IC, the Attack Time and Release Time can be set in the boost side and cut side of AGC separately.
430
RR1
20k
RR2
2 LS1 LS2
3
C1 1
+
RL1 1Meg
C2 1
+
RL2 1Meg
Detector circuit of suppression Attack Time Recovery Time : RR1 x C1 : RL1 x C1
Detector circuit of amplification Attack Time Recovery Time : RR2 x C2 : RL2 x C2
The Attack Time and Recovery Time shall be set by a resistor in IC and external capacitor and resistor. The internal resistance is RR1=430 and RR2=20K (Typ). If the constant of capacitor C2 of LS2 decreases, an amplification starting point is shifted in a direction of smaller input voltage. Moreover, the distortion rate also changes and becomes worse. If the constant of capacitor C1 of LS1C1 decreases, the distortion rate becomes worse. If the resistance value of RL1 increases, the suppression is reduced.
!SURROUND (1) Setting of Frequency Characteristic This IC has an output terminal (4pin) for the surround signal. The surround characteristic can be varied by adding an appropriate filter to this terminal. An example of characteristic that low-pass filter has been set is shown below :
+ - 10k R1 0.0047 C SOUT 4 + -
f1 =
1 2CR2 1 2C(R1 + R2) R2 R1 + R2
f2 =
4.7k
R2
A1 =
An amplifier to define the sound effect.
A2 = 1
A2
Gain [dB]
A1
f2 Frequency [Hz]
f1
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(2) Setting of Phase Shifter This IC contains two stages of phase shifters. If none of two stages of phase shifters are not used, the pseudo-stereo function is also unavailable. If only one of these phase shifters is used, the normal of pseudo stereo may be spoiled.
R3 18k R3 18k
Resistance in IC is 18k (Typ.). R2 18k - R1 18k 29 C1 0.1 + R1 18k 30 C1 R2 18k - 0.1
t2 x P2 Phase shifter
= -2tan-1 (2fR1C1)
(3) Surround and Pseudo-Stereo Operation
t1t2 : Time delayed by a phase shifter
P1 P2 : Attenuation made by a phase shifter E : Surround effect 1) Surround
Lch 28 t1 x P1 L-R Phase shifter
+
xE
Effect control LPF
Rch
5
2) Pseudo stereo
Lch 28 t1 x P1 2 (L+R) B, P, F Configured externally Rch 5
+ +
t2 x P2 Phase shifter
xE
Effect control LPF
Phase shifter
The above-mentioned figures show the block diagram of surround and pseudo stereo ICs. The characteristics of surround and pseudo stereo can be varied by changing the effect. Moreover, the number of states of phase shifters can be increased by turning on a switch of loop. However, an operation becomes unstable if the gain of effect is increased while the switch of loop remains turning on. Therefore, the effect should be approximately 6 dB. Upon switching the surround and pseudo stereo to each other, be sure to turn on a switch at the stereo surround side of SSTE to prevent a shock sound.
+
+
+
21
LOUT = L + t1 t2P1P2 (L-R) E
+
+
-
12
ROUT = R - t1 t2P1P2 (L-R) E
+
+
21
LOUT = L + t1 t2P1P2 (L+R) E
+
-
12
ROUT = R - t1 t2P1P2 (L+R) E
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Audio ICs
!BBE This IC is equipped with BBE to achieve the clear sound. The characteristic can be changed by an external constant. If any constant other than recommendable ones is used, please ask BBE for confirmation. Frequency setting
fC1 = 1 1 = 2 x 21.5k x C1 2 x 21.5k x 0.033 1 1 = 2 x 21.5k x C2 2 x 21.5k x 0.0033 1 1 = 2 x 21.5k x C3 2 x 56.2k x 47p 224Hz
fC2 =
2.24kHz
fC3 =
60.3kHz
C1=Capacity between 6pin-7pin, and 27pin-26pin. C2=Capacity between 8pin-9pin, and 25pin-24pin.
Gain
3dB fC1 fC2 fC3 Freq.
fC3 is fixed at the inside.
!Tone control Setting of bass frequency
fC = 1 2 x 30k x C (Hz)
+ - 30k 23pin 10pin
Gain
C
Gain
3dB
fC Freq.
Equivalent Circuit
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BH3868BFS
Audio ICs
Setting of treble frequncy
fC1 = fC2 = 1 2 x 30k x C (Hz) 1 2 x 30k x 60p 88k (Hz)
30k 22pin 11pin 30k
C 60p
Equivalent Circuit
- +
+ -
Gain
3dB Gain
fC1
88k Freq.
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VCC
62k
Audio ICs
!Application
100 39k
0.1
0.1
10
0.033 0.033 1000p 10 4.7 4.7
0.0033
Fig.3
AGC L-R L+R PHASE SHIFT LPF AMP VOL R-S TONE BBE
BIAS
32
BBE VOL L+S TONE VOL Vref LOGIC CONTROL VOL VCC
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
10
11
12
13
14
15
1
1Meg 4.7k
2
1 1 0.0047 10 0.033 1Meg
3
4
5
6
7
8
0.0033
9
BH3868BFS
0.033
1000p
10
4.7
4.7
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BH3868BFS
Audio ICs
!Electrical characteristics curve
TOTAL HARMONIC DISTORTION : THD (%)
48 Condition : in view of electrical characteristics 44 40 36 32 28 24 20 16 12 8 4 0 0 1 2 3 4 5 6 7 8 9 10
10 5
OUTPUT GAIN : G (dB)
+20 +16 +12 +8 +4 -0 -4 -8 -12 -16 bass cut flat bass boost
treble boost
QUIESCENT CURRENT : IQ (mA)
2 1 0.5 0.2 0.1 0.05 0.02 0.01 1m 2m 5m 10m 20m 50m 100m200m 500m 1 INPUT VOLTAGE : VIN (Vrms) 23
treble cut
-20 10 20 50 100 200 500 1k 2k
5k 10k 20k 50k100k
POWER SUPPLY VOLTAGE : VCC (V)
INPUT FREQUENCY : f (Hz)
Fig.4 Quiescent current
Fig.5 THD
Fig.6 Tone frequency
+15 +12.5
NOISE VOLTAGE : VNO (Vrms)
60 50 40 30 20 10 0 5k 10k 20k 50k100k
OUTPUT GAIN : G (dB)
+10 +7.5 +5 +2.5 +0 -2.5 -5 -7.5 -10 10 20 50 100 200 500 1k 2k
0 -10 -20 -30 -40 -50 -60 -70 -80 -90 ATTENUATION : VATT (dB)
INPUT FREQUENCY : f (Hz)
Fig.7 BBE frequency
Fig.8 Noise level
!Operation notes 1. We trust that an example of application circuits are recommendable and we would like to ask you to check the undermentioned notes and the characteristics carefully. If you will modify and external circuit constant upon use, you should allow for not only static characteristics but also transient characteristics, unexpected variation of external components and our ICs. 2. Operating power supply voltage range Basic circuit function and operation can be guaranteed within the operating temperature range and within the operating power supply voltage range. Upon use, check those ranges carefully and specify the content, element, voltage and temperature.
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Audio ICs
3. Step switching noise In an example of application circuit, an example of constant is set on VC1, VC2, TC and BC terminals. This constant varies depending on signal level setting, actual wiring pattern, etc. Specify each constant under careful study and examination. The internal equivalent circuit is shown below. (A primary integration circuit is set for gradual variation.)
R Every terminal + C (External) -
R value (k) VC1, VC2, TC, BC 30
4. Level setting of volume and tone Attenuation to control serial data is stated as a reference value in our specifications. An internal D/A converter is configured by the R-2R method and, therefore, there is any data also in an area in which some data are not consecutive. Use is for fine adjustment. However, the volume must be within 8 bits (256 steps) and the tone must be 7 bits (64+1 steps). 5. I C BUS control High-frequency digital signal is inputted into the SCL terminal and SDA terminal. Therefore, However, wire not to interfere any analog signal system line. 6. Power-on Reset This IC contains a circuit for initialization when the power supply turns on. Every channel volume has been set to become - when the power supply turns on. When the power supply is turned ON once and OFF and then ON again immediately, the said description may not be achieved if any load remains in a capacitor. In this case, apply 2 muting until a command of I C BUS has been sent. 7. Capacitor of VREF (8pin) 100F is recommended as the capacity of power supply filter attached to VREF. If this capacity is decreased, the maximum attenuation of volume is deteriorated and the cross-talk also tends to become worse. This IC contains a precharge circuit and discharge circuit for capacitor attached to VREF.
2
!BBE process The BBE sound processor considers a loudspeaker and amplifier as total audio system, reproduces accurately "Rise of Sound" which characterizes the sound, by an appropriate signal processing at a stage before amplifier input, and makes the playback sound an original one as naturally as possible.
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BH3868BFS
Audio ICs
!Problem in Sound Reproduction with Audio System and BBE Process In general, for the natural sound, treble harmonic element is generated first and then bass basic wave element is produced. This is the same with the attack part which shows the characteristics of various musical instruments. The amplitude element, which forms a frequency element and envelope at the rise of sound, expresses the character of the sound. Therefore, to reproduce any sound with a playback system, it is very important to express accurately the rise of sound against the original sound. However, there is unavoidable mismatch between a loudspeaker and amplifier of today's audio playback system. For example, a power amplifier with transistor operates as constant-voltage source, but mismatch cannot be avoided because one loudspeaker is a current element. Moreover, the impedance characteristic of loudspeaker is affected considerably by electric reactance of voice coil or mechanical reactance of cone assembly. As a result, the rise of sound is distorted and the phase of playback sound is deviated. Furthermore, due to the increase of treble impedance, the loudspeaker amplitude is reduced and the harmonic element is deteriorated. So the treble element is easy to be masked by a consequent middle tone element of high level, and the rise of sound is hard to be produced accurately. BBE has been developed to solve those problems. BBE is a technology to reproduce the sound clearness more naturally by moving the delayed harmonic before the basic wave first to construct the same wave as that of the natural sound and then boosting slightly the treble which is easy to be attenuated. Because of the synergistic effect of phase correction and treble boost, the same clearness can be obtained by approximately half boost in comparison with a simple boost of equalizer. It has been ten years or more since BBE was introduced into many recording studios, PA, SR sites and broadcasting stations, and 100,000 or more units of BBE for professional have been using. BBE is designated by many musicians to improve the sound of vocal and musical instruments.
!Principle of Operation To solve the problems in audio playback system mentioned in the previous page, the BBE processor processes a signal as follows: !Phase Correction
Bass Middle Treble
20
150
2.4k
20k
f (Hz)
By dividing the input signal to three frequency bands, "Bass" (20 to 150 Hz), "Middle" (150Hz to 2.4kHz) and "Treble" (2.4k to 20kHz), and by adding them again, the phase difference -360 in Treble and -180 in Middle against Base are generated. These phase differences adjusts the time delay characteristic in every frequency band and minimizes the distortion of the rise of sound.
!Revision of harmonic element Gain is applied to Treble, because the harmonic element (Treble element), of which gain is expected to be deteriorated depending on the loudspeaker characteristic, must be enhanced. However, if Treble is clear, it may seem that Bass is insufficient. This can be corrected by applying the gain to Bass. There are many audio system characteristics. The most suitable correction effect for your system can be obtained by BBE.
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BH3868BFS
Audio ICs
!License agreement about patent and trademark BBE is a registered trademark of BBE Sound Inc. Only authorized party, who is permitted to use the trademark and patent of BBE, can supply and sell BH3868BFS. For such trademark and patent of BBE, please contact : BBE Sound lnc. 5381 Production Drive Huntington Beach, CA 92649 Tel:(714)897-6766 Fax:(714)896-0736
!External dimensions (Units : mm)
13.60.2 32
7.80.3 5.40.2
17
1
1.80.1
16
0.11
0.8
0.360.1
0.3Min. 0.15
SSOP-A32
0.150.1
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Appendix
Notes
No technical content pages of this document may be reproduced in any form or transmitted by any means without prior permission of ROHM CO.,LTD. The contents described herein are subject to change without notice. The specifications for the product described in this document are for reference only. Upon actual use, therefore, please request that specifications to be separately delivered. Application circuit diagrams and circuit constants contained herein are shown as examples of standard use and operation. Please pay careful attention to the peripheral conditions when designing circuits and deciding upon circuit constants in the set. Any data, including, but not limited to application circuit diagrams information, described herein are intended only as illustrations of such devices and not as the specifications for such devices. ROHM CO.,LTD. disclaims any warranty that any use of such devices shall be free from infringement of any third party's intellectual property rights or other proprietary rights, and further, assumes no liability of whatsoever nature in the event of any such infringement, or arising from or connected with or related to the use of such devices. Upon the sale of any such devices, other than for buyer's right to use such devices itself, resell or otherwise dispose of the same, no express or implied right or license to practice or commercially exploit any intellectual property rights or other proprietary rights owned or controlled by ROHM CO., LTD. is granted to any such buyer. Products listed in this document use silicon as a basic material. Products listed in this document are no antiradiation design.
The products listed in this document are designed to be used with ordinary electronic equipment or devices (such as audio visual equipment, office-automation equipment, communications devices, electrical appliances and electronic toys). Should you intend to use these products with equipment or devices which require an extremely high level of reliability and the malfunction of with would directly endanger human life (such as medical instruments, transportation equipment, aerospace machinery, nuclear-reactor controllers, fuel controllers and other safety devices), please be sure to consult with our sales representative in advance. About Export Control Order in Japan Products described herein are the objects of controlled goods in Annex 1 (Item 16) of Export Trade Control Order in Japan. In case of export from Japan, please confirm if it applies to "objective" criteria or an "informed" (by MITI clause) on the basis of "catch all controls for Non-Proliferation of Weapons of Mass Destruction.
Appendix1-Rev1.0

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